Siemens CPU 1212C ,DC/DC/DC, 8DI/6DO/2AI - 6ES7212-1AE40-0XB0
SIMATIC S7-1200, CPU 1212C, compact CPU, DC/DC/DC, onboard I/O: 8 DI 24 V DC; 6 DO 24 V DC; 2 AI 0-10 V DC, Power supply: DC 20.4-28.8V DC, Program/data memory 75...
Cena bez pdv-a: 31.199,40 |
Cena sa pdv-om: 37.439,28 |
SIMATIC S7-1200, CPU 1212C, compact CPU, DC/DC/DC, onboard I/O: 8 DI 24 V DC; 6 DO 24 V DC; 2 AI 0-10 V DC, Power supply: DC 20.4-28.8V DC, Program/data memory 75 KB
| General information | |
| Product type designation | CPU 1212C DC/DC/DC |
| Firmware version | V4.5 |
| Engineering with | |
| ● Programming package | STEP 7 V17 or higher |
| Supply voltage | |
| Rated value (DC) | |
| ● 24 V DC | Yes |
| permissible range, lower limit (DC) | 20.4 V |
| permissible range, upper limit (DC) | 28.8 V |
| Reverse polarity protection | Yes |
| Load voltage L+ | |
| ● Rated value (DC) | 24 V |
| ● permissible range, lower limit (DC) | 20.4 V |
| ● permissible range, upper limit (DC) | 28.8 V |
| Input current | |
| Current consumption (rated value) | 400 mA; CPU only |
| Current consumption, max. | 1 200 mA; CPU with all expansion modules |
| Inrush current, max. | 12 A; at 28.8 V DC |
| I²t | 0.5 A²·s |
| Output current | |
| for backplane bus (5 V DC), max. | 1 000 mA; Max. 5 V DC for SM and CM |
| Encoder supply | |
| 24 V encoder supply | |
| ● 24 V | L+ minus 4 V DC min. |
| Power loss | |
| Power loss, typ. | 9 W |
| Memory | |
| Work memory | |
| ● integrated | 75 kbyte |
| ● expandable | No |
| Load memory | |
| ● integrated | 2 Mbyte |
| ● Plug-in (SIMATIC Memory Card), max. | with SIMATIC memory card |
| Backup | |
| ● present | Yes |
| ● maintenance-free | Yes |
| ● without battery | Yes |
| CPU processing times | |
| for bit operations, typ. | 0.08 µs; / instruction |
| for word operations, typ. | 1.7 µs; / instruction |
| for floating point arithmetic, typ. | 2.3 µs; / instruction |
| CPU-blocks | |
| Number of blocks (total) | DBs, FCs, FBs, counters and timers. The maximum number of addressable blocks ranges from 1 to 65535. There is no restriction, the entire working memory can be used |
| OB | |
| ● Number, max. | Limited only by RAM for code |
| Data areas and their retentivity | |
| Retentive data area (incl. timers, counters, flags), max. | 14 kbyte |
| Flag | |
| ● Size, max. | 4 kbyte; Size of bit memory address area |
| Local data | |
| ● per priority class, max. | 16 kbyte; Priority class 1 (program cycle): 16 KB, priority class 2 to 26: 6 KB |
| Address area | |
| Process image | |
| ● Inputs, adjustable | 1 kbyte |
| ● Outputs, adjustable | 1 kbyte |
| Hardware configuration | |
| Number of modules per system, max. | 3 comm. modules, 1 signal board, 2 signal modules |
| Time of day | |
| Clock | |
| ● Hardware clock (real-time) | Yes |
| ● Backup time | 480 h; Typical |
| ● Deviation per day, max. | ±60 s/month at 25 °C |
| Digital inputs | |
| Number of digital inputs | 8; Integrated |
| ● of which inputs usable for technological functions | 6; HSC (High Speed Counting) |
| Source/sink input | Yes |
| Number of simultaneously controllable inputs | |
| all mounting positions | |
| — up to 40 °C, max. | 8 |
| Input voltage | |
| ● Rated value (DC) | 24 V |
| ● for signal "0" | 5 V DC at 1 mA |
| ● for signal "1" | 15 V DC at 2.5 mA |
| Input delay (for rated value of input voltage) | |
| for standard inputs | |
| — parameterizable | 0.2 ms, 0.4 ms, 0.8 ms, 1 |
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